How to Apply for Senior EMC / Hardware Engineer 2026: Eligibility, Last Date & Preparation Guide

You are hiring a senior-level hardware design engineer who specializes in EMC troubleshooting and isolated PoE power design for networking and wireless products. This is a hands-on design role, not a compliance test operator. Atheer ACT is a Saudi deep-tech telecommunications company building carrier-grade 60 GHz and mmWave wireless infrastructure for high-throughput backhaul and enterprise connectivity. What they will do: This engineer will be responsible for diagnosing and fixing a live EMC compliance failure on the PoE port of an outdoor wireless radio product. Their work will directly impact the success of the current certification cycle. Key responsibilities include: Analyze EMC failure plots and identify root causes quickly. Redesign isolated PoE PD converters (IEEE 802.3bt Type 3/4). Design and tune magnetics: flyback transformers, common-mode chokes, isolation barriers. Optimize PCB layout for EMC performance: grounding, isolation, filter placement. Reduce conducted emissions on telecom ports (CISPR 32 / EN 55032 using ISN). Guide the product through full EMC certification, including retests. Work closely with hardware, RF, and compliance teams. Must-have experience: 8+ years of experience designing PoE power stages, solving EMC failures, and shipping telecom or networking hardware through certification. Bachelor's degree or higher in Electrical Engineering, Electronics, or a related field. Isolated PoE PD converter design compliant with IEEE 802.3bt Type 3 or Type 4. Flyback topology design and transformer construction. Common-mode choke selection under DC bias. CISPR 32 / EN 55032 conducted emissions testing on telecom ports using ISN. PCB layout for EMC performance. This guide explains exactly how to apply for this Atheer ACT post in Pakistan, the important dates, the test pattern, and a preparation strategy to score well.